Photonic Integration technology and the role of the generic foundry model

Can a spaceship fit into your pocket? How about one million spaceships? The question seems irrational but is way more realistic than you may expect. Actually, the smartphone that we carry in our pockets is millions of times more powerful than the Apollo 11 guidance computer system! Billions of transistors fit into only a few square centimeters to achieve this tremendous performance. But have you ever considered how can these nanoscale structures are developed and exhibit the exact same performance over and over again? The answer lies in the advances of the Integrated Circuit (IC) technology. Major technological breakthroughs that have taken place the last decades in the development of ICs have permitted the integration of a huge number of transistors on a single wafer, outperforming equivalent combinations of discrete electronic components at the functional level.

While electronics have set the paradigm, the thriving photonics industry is following the same path to leverage its immense capabilities. Photonic Integrated Circuits (PICs) comprising a large number of optical building blocks on a single chip, aggregate multiple photonic functions leading to the development of new products and services with substantial economic benefits. Among the key photonic integration technology platforms, Indium Phoshide (InP) has played a key role in the development and commercialization of high-performance optical components and optoelectronic devices for a wide range of applications due to its unique high speed capabilities and its potential for large scale monolithic integration. Nevertheless, it is considered an inherently expensive technology compared to silicon photonics which relies on mature, low-cost CMOS processes. Significant efforts towards decreasing development costs and lowering the boundaries for fast prototyping is pursued via JePPIX [1], the EC manufacturing pilot line project for photonic integrated circuits based on InP through open access to multi-project-wafer (MPW) runs.

JePPIX represents the generic foundry model for photonic integration technologies in Europe and it is gaining momentum against the vertical fabs, since it enables designers to create new circuits with the ultimate freedom placing building blocks to suit circuit needs across markets and product generations. The term “generic” means that the performance of a building block does not affect the performance of its neighboring one in complex PICs and it can be reproduced when the building block is used as part of another integrated circuit co-existing with other building blocks. The rules for developing a building block on a PIC platform are included in the platform’s process design kit (PDK) and they are specific to every platform. In order to unleash the vast potential of photonic integration it is thus important that every building block is developed according to the platform-specific PDK library. As a result, when designing PICs for specific applications, all building blocks perform according to their predictable performance. At the same time, novel PICs with advanced functionalities can be investigated already from the design phase, hence exploring new application fields and market opportunities.


Photonic Integrated Circuits (PICs) comprising a large number of optical building blocks on a single chip, aggregate multiple photonic functions leading to the development of new products and services with substantial economic benefits.


PICaboo is a Horizon 2020 ICT project funded by the European Commission and the Photonics Public Private Partnership (PPP) which will develop novel building blocks compatible with the generic foundry model, and application-specific photonic integrated circuits (PICs) that will transform optical communication networks in terms of key performance parameters like speed, power consumption and cost. PICaboo will advance two major European InP PIC technology platforms (TUe and III-V Lab) with the integration of novel building blocks that will be used to design advanced PICs with novel functionalities that meet the requirements of industrial photonic application roadmaps. Technology development will rely on standardized procedures that comply with the generic process flow of each platform i.e. the process-design kit (PDK) platform libraries which describe the building blocks based on the set of fabrication rules and operating characteristics. Exploitation of the PICs that will be developed within PICaboo will be undertaken by its industrial partners, NOKIA and ADVA. Apart from the application-specific PIC demonstrators, the applicability of the developed building blocks will be investigated further for alternative applications in which photonics plays a key role, exploiting the respective PDKs for the design of new circuits. In this way, the developed building blocks will leverage the potential to penetrate additional established or emerging markets e.g. quantum, metrology and sensing.

For more technical information regarding the project and its goals please follow the “Objectives” and “Project Public Documents” subsections.